1. Field of the Invention
The present invention relates to driving a Plasma Display Panel (PDP).
2. Description of the Related Art
Recently, PDPs are being highlighted as flat panel displays in that they are superior to other flat panel displays with regard to high luminance, high luminous efficiency and a wide viewing angle.
A PDP uses a plasma generated by a gas discharge to display characters or images. The PDP includes, according to its size, more than several tens to millions of pixels arranged in the form of a matrix.
The PDP includes two glass substrates spaced apart from each other to face each other. Scan electrodes and sustain electrodes, which are covered with a dielectric layer and a protection film, are formed in pairs in parallel on the glass substrate. A plurality of address electrodes, which are covered with an insulation layer, are also formed on the glass substrate. Barrier ribs are formed in parallel with the address electrodes on the insulation layer such that each rib is interposed between adjacent address electrodes. A phosphor is coated on the surface of the insulation layer and on both sides of each of the barrier ribs. The glass substrates are arranged to face each other while defining a discharge space therebetween so that the address electrodes are orthogonal to the scan electrodes and sustain electrodes. In the discharge space, discharge cells are respectively formed at intersections between the address electrodes and the pairs of scan electrodes and sustain electrodes.
The electrodes of the PDP are arranged in the form of an n×m matrix. That is, a plurality of address electrodes A1 to Am are arranged in a column direction, and a plurality of scan electrodes Y1 to Yn and a plurality of sustain electrodes X1 to Xn are arranged in pairs in a row direction.
In the PDP, one frame is divided into a plurality of sub-fields that are combined to express a gray scale. Each of the sub-fields is composed of a reset period, an address period and a sustain period.
In the reset period, wall charges formed by a previous sustain discharge are erased. Also, wall charges are set up to stably perform a next address discharge. In the address period, cells that are turned on and cells that are not turned on are selected in the panel, and wall charges are accumulated on the turned-on cells (i.e., addressed cells). In the sustain period, a sustain discharge occurs to actually display an image on the addressed cells.
Here, the term “wall charges” refers to charges that are formed proximate to the electrodes on the wall (for example, dielectric layer) of the discharge cells and stored on the electrodes. The wall charges do not actually touch the electrodes themselves because the dielectric layer covers the electrodes. However, for simplicity of description, the charges will be described herein as being “formed on”, “stored on” and/or “accumulated on” the electrodes. Furthermore, the term “wall voltage” refers to a potential difference that is generated on the wall of the discharge cells by the wall charges.
In the PDP, a driving operation moves from the address period to the sustain period after dropping voltages at the Y electrodes to 0V at the end of the address period.
In order to drop all of the Y electrode voltages to 0V at the same time, low-voltage driving switches of all scan ICs are turned on at the same time, thereby causing a very large amount of current to instantaneously flow in the scan ICs, resulting in noise and ElectroMagnetic Interference (EMI) in a driving circuit as well as instability of the driving circuit.